Recently, wireless services using high frequencies such as mobile phone services, wireless LAN (Local Area Network) and the like are becoming increasingly popular. Such wireless services generally use a frequency band that is different for each wireless service or for each area in which the wireless service is provided. Given these background circumstances, attention is being focused on reconfigurable RF technology that can use a plurality of wireless services at one wireless terminal. For example, as an example of reconfigurable RF technology that can receive wireless signals for different frequency bands using one RF circuit, a charge domain filter circuit is proposed (refer to Non-Patent Literature 1). Next, the charge domain filter circuit will be explained simply with reference to FIG. 10.
FIG. 10 is an explanatory figure that shows the circuit configuration of a charge domain filter circuit 10. The charge domain filter circuit 10 includes a transconductor (gm) 12, an IIR capacitor 14, a first charge sample circuit 20, a second charge sample circuit 40, and an output capacitor 50. In addition, the charge domain filter circuit 10 operates based on a control signal output by a circuit control device (not shown in the figures).
The transconductor 12 is a voltage-current converter that coverts a voltage of an input signal to a current that is proportional to the voltage, and outputs the current. The IIR capacitor 14 is connected to the transconductor 12, and functions to attribute IIR (Infinite Impulse Response) characteristics to the charge domain filter circuit 10.
The first charge sample circuit 20 includes capacitors 22, 26, 30 and 34. For example, while a control signal φ1 input to the charge domain filter circuit 10 has a high level, a switch 21 is switched on, and the capacitor 22 is charged by (charging) the current output by the transconductor 12. Further, while a control signal φ2 input to the charge domain filter circuit 10 has a high level, a switch 25 is switched on, and the capacitor 26 is charged by the current output by the transconductor 12.
Next, while control signals φ4 and ψ1 input to the charge domain filter circuit 10 have a high level, switches 23, 27 and 41 are switched on. As a result, part of the electric charge stored by charging in the capacitors 22 and 26 is output to a capacitor 42 of the second charge sample circuit 40. Then, electric charge that accords with a capacitance value of the capacitors 22, 26 and 42 is stored in the capacitors 22, 26 and 42 respectively until an equilibrium state is reached. Hereinafter, sharing of electric charge among a plurality of capacitors in this manner is referred to as charge sharing.
Following this, while a control signal φ1r input to the charge domain filter circuit 10 has a high level, a switch 24 is switched on, and remaining electric charge of the capacitor 22 is discharged. Moreover, while a control signal φ2r input to the charge domain filter circuit 10 has a high level, a switch 28 is switched on and remaining electric charge of the capacitor 26 is discharged. Similarly, following discharging of the current supplied by the transconductor 12, the capacitors 30 and 34 perform charge sharing, and electric charge remaining in the capacitors 30 and 34 is discharged in preparation for the next charging.
Non-Patent Literature 1: 2006 IEEE International Solid-State Circuits Conference 26.6, “An 800 MHz to 5 GHz Software-Defined Radio Receiver in 90 nm CMOS”